The Brainf*ck CPU Project

Download the VHDL sources now: bfcpu-0.09.tar.gz


Hardware the world does not need: A CPU core than is executing
Brainf*ck code directly in hardware without any software interpreter.

                |               |
      clk ----->|               |----> addr [15:0]
      rst ----->|               |
                |  B F - C P U  |<-- data_r [7:0]
[7:0] data_o <--|               |--> data_w [7:0]
      enab_o <--|               |--> enab_w
                |    CW 6670    |
[7:0] data_i -->|               |
      enab_i -->|    CW 6671    |
      ackb_i <--|               |
                |               |
I've developed this hardware just to have a cool example for hardware development in VHDL.

Currently there are two revisions of the Brainf*ck CPU in existence: The CW6670 and the CW6671. While the CW6670 is a simple straight-forward implementation of a CPU executing native brainf*ck code, the CW6671 is an optimized version with an internal 1 byte data cache.

The source archive contains a detailed README, the VHDL sources, a testbench, a Spartan-II based example implementation and demo Brainf*ck programs.

I've also developed a Brainf*ck Compiler.

I gave an introduction to HDL development at 20C3. The slides can be found here.